Field of the Invention
The present invention relates to a semiconductor device, and particularly to a power semiconductor device.
Description of the Background Art
A power semiconductor device includes a high breakdown voltage power module which can withstand a voltage of, for example, 600 V or higher. Such a power module may have a diode formed thereon.
For example, Japanese Patent Laying-Open No. 02-066977 discloses a diode having a pn junction formed by an n− layer adjacent to a p layer, in which an n+ region and a p+ region are located on the surface of the if layer opposite to the p+ layer. In addition, an n buffer layer is located between the if layer and the region including the n+ region and the p+ region. This document discloses that the p+ region has an effect of reducing a reverse recovery current of the diode and also shortening the reverse recovery time. It also discloses that the n buffer layer can prevent the depletion layer from extending to the if n− layer during application of the reverse voltage, which allows a reduction in thickness of the n− layer, with the result that the reverse recovery characteristics of the high breakdown voltage diode can be improved.
Furthermore, for example, Japanese Patent Laying-Open No. 08-172205 discloses a diode including an n− semiconductor layer formed on one main surface of an n-type semiconductor substrate; an n+ cathode region formed on the surface layer of the n− semiconductor layer; a trench extending from the surface of the n+ cathode region through the n− semiconductor layer to the n-type semiconductor substrate; a gate electrode filling the trench with a gate oxide film interposed therebetween; an insulation film formed on the gate electrode; a cathode electrode in contact with the surface of the n+ cathode region interposed between the trenches; a p+ anode region formed on a part of the surface layer of the n-type semiconductor substrate; and an anode electrode in contact with the p+ anode region. According to this document, as the gate electrode is applied with a voltage which is negative with respect to the cathode electrode, a breakdown of the diode and burning of the switching transformer can be prevented when an overcurrent flows through the diode.
With regard to the power diode, it is difficult to solve the problems involved in both of the tasks of decreasing a forward voltage drop (VF) and suppressing the oscillation at the time of recovery (reverse recovery). For example, Japanese Patent Laying-Open No. 02-066977 as described above merely discloses that the recovery characteristics can be improved by providing a p+ region, but fails to disclose how to configure the p+ region for allowing the above-described problems to be solved in a balanced manner.
Furthermore, it may be desirable to especially decrease VF depending on the use of the power diode. However, according to the technique disclosed in Japanese Patent Laying-Open No. 08-172205 described above, the gate electrode is applied with a voltage that is negative with respect to the cathode electrode, which causes a problem of an increase in VF.